1/8 july 2002 STS6DNF30V dual n-channel 30v - 0.026 w - 6a so-8 2.5v-drive stripfet? ii power mosfet n typical r ds (on) = 0.026 w (@4.5v) n typical r ds (on) = 0.030 w (@2.5v) n ultra low threshold gate drive (2.5v) n standard outline for easy automated surface mount assembly description this power mosfet is the latest development of stmicroelectronics unique single feature size ? strip-based process. the resulting transistor shows extremely high packing density for low on-resis- tance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable man- ufacturing reproducibility. applications n battery safety unit in nomadic equipment n dc-dc converters n power management in portable/ desktop pc s absolute maximum ratings ( l ) pulse width limited by safe operating area type v dss r ds(on) i d STS6DNF30V 30 v <0.030 w (@4.5v) <0.038 w (@2.5v) 6 a symbol parameter value unit v ds drain-source voltage (v gs = 0) 30 v v dgr drain-gate voltage (r gs = 20 k w ) 30 v v gs gate- source voltage 12 v i d drain current (continuos) at t c = 25c single operation drain current (continuos) at t c = 100c single operation 6 3.8 a a i dm ( l ) drain current (pulsed) 24 a p tot total dissipation at t c = 25c dual operation total dissipation at t c = 25c single operation 2 1.6 w w so-8 internal schematic diagram
STS6DNF30V 2/8 thermal data electrical characteristics (tcase = 25 c unless otherwise specified) off on (1) dynamic rthj-amb thermal resistance junction-ambient max single operation thermal resistance junction-ambient max dual operation 78 62.5 c/w c/w t j max. operating junction temperature 150 c t stg storage temperature C65 to 150 c symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 250 a, v gs = 0 30 v i dss zero gate voltage drain current (v gs = 0) v ds = max rating 1a v ds = max rating, t c = 125 c 10 a i gss gate-body leakage current (v ds = 0) v gs = 12v 100 na symbol parameter test conditions min. typ. max. unit v gs(th) gate threshold voltage v ds = v gs , i d = 250a 0.6 v r ds(on) static drain-source on resistance v gs = 4.5 v, i d = 3 a 0.026 0.030 w v gs = 2.5 v, i d = 3 a 0.030 0.038 w symbol parameter test conditions min. typ. max. unit g fs (1) forward transconductance v ds > i d(on) x r ds(on)max, i d = 3 a 15 s c iss input capacitance v ds = 25 v, f = 1 mhz, v gs = 0 800 pf c oss output capacitance 180 pf c rss reverse transfer capacitance 32 pf
3/8 STS6DNF30V electrical characteristics (continued) switching on switching off source drain diode note: 1. pulsed: pulse duration = 300 s, duty cycle 1.5 %. 2. pulse width limited by safe operating area. symbol parameter test conditions min. typ. max. unit t d(on) turn-on delay time v dd = 15 v, i d = 3 a r g = 4.7 w v gs = 2.5v (see test circuit, figure 3) 20 ns t r rise time 25 ns q g q gs q gd total gate charge gate-source charge gate-drain charge v dd = 15 v, i d = 6 a, v gs = 2.5 v 6.8 2 3.4 9.5 nc nc nc symbol parameter test conditions min. typ. max. unit t d(off) t f turn-off-delay time fall time v dd = 10 v, i d = 3 a, r g =4.7 w, v gs = 2.5 v (see test circuit, figure 3) 32 13 ns ns symbol parameter test conditions min. typ. max. unit i sd source-drain current 6 a i sdm (2) source-drain current (pulsed) 24 a v sd (1) forward on voltage i sd = 6 a, v gs = 0 1.2 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 6 a, di/dt = 100a/s, v dd = 15 v, t j = 150c (see test circuit, figure 5) 25 21 1.7 ns nc a safe operating area thermal impedance
STS6DNF30V 4/8 transconductance transfer characteristics gate charge vs gate-source voltage capacitance variations static drain-source on resistance output characteristics
5/8 STS6DNF30V source-drain diode forward characteristics normalized on resistance vs temperature normalized gate thereshold voltage vs temp.
STS6DNF30V 6/8 fig. 5: test circuit for inductive load switching and diode recovery times fig. 4: gate charge test circuit fig. 2: unclamped inductive waveform fig. 1: unclamped inductive load test circuit fig. 3: switching times test circuit for resistive load
7/8 STS6DNF30V dim. mm inch min. typ. max. min. typ. max. a1.750.068 a1 0.1 0.25 0.003 0.009 a2 1.65 0.064 a3 0.65 0.85 0.025 0.033 b 0.35 0.48 0.013 0.018 b1 0.19 0.25 0.007 0.010 c 0.25 0.5 0.010 0.019 c1 45 (typ.) d 4.8 5.0 0.188 0.196 e 5.8 6.2 0.228 0.244 e1.27 0.050 e3 3.81 0.150 f 3.8 4.0 0.14 0.157 l 0.4 1.27 0.015 0.050 m0.60.023 s 8 (max.) 0016023 so-8 mechanical data
STS6DNF30V 8/8 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no res ponsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result f rom its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specificati ons mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devi ces or systems without express written approval of stmicroelectronics. ? the st logo is a registered trademark of stmicroelectronics ? 2002 stmicroelectronics - printed in italy - all rights reserved stmicroelectronics group of companies australia - brazil - canada - china - finland - france - germany - hong kong - india - israel - italy - japan - malaysia - malt a - morocco singapore - spain - sweden - switzerland - united kingdom - united states. ? http://www.st.com
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